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DISCRETE SEMICONDUCTORS
DATA SHEET
ook, halfpage
M3D088
PDTB114ET PNP resistor-equipped transistor
Objective specification Supersedes data of February 1995 File under Discrete Semiconductors, SC04 1997 Sep 02
Philips Semiconductors
Objective specification
PNP resistor-equipped transistor
FEATURES * Built-in bias resistors R1 and R2 (typ. 10 k each) * Simplification of circuit design * Reduces number of components and board space. APPLICATIONS * Especially suitable for space reduction in interface and driver circuits * Inverter circuit configurations without use of external resistors.
handbook, 4 columns
PDTB114ET
3 3 R1 1 R2 2 1 2
MAM100
Top view
Fig.1 Simplified outline (SOT23) and symbol. DESCRIPTION PNP resistor-equipped transistor in a SOT23 plastic package. NPN complement: PDTD114ET.
1 3 2
MARKING TYPE NUMBER PDTB114ET MARKING CODE p09
PINNING PIN 1 2 3 DESCRIPTION base/input emitter/ground (+) collector/output
MGA893 - 1
Fig.2
Equivalent inverter symbol.
QUICK REFERENCE DATA SYMBOL VCEO IO ICM Ptot hFE R1 R2 ------R1 PARAMETER collector-emitter voltage output current (DC) peak collector current total power dissipation DC current gain input resistor resistor ratio Tamb 25 C IC = -50 mA; VCE = -5 V CONDITIONS open base - - - - 56 7 0.8 MIN. - - - - - 10 1 TYP. MAX. -50 -500 -500 250 - 13 1.2 k UNIT V mA mA mW
1997 Sep 02
2
Philips Semiconductors
Objective specification
PNP resistor-equipped transistor
LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 134). SYMBOL VCBO VCEO VEBO VI PARAMETER collector-base voltage collector-emitter voltage emitter-base voltage input voltage positive negative IO ICM Ptot Tstg Tj Tamb Note 1. Transistor mounted on an FR4 printed-circuit board. THERMAL CHARACTERISTICS SYMBOL Rth j-a Note 1. Transistor mounted on an FR4 printed-circuit board. PARAMETER thermal resistance from junction to ambient CONDITIONS note 1 output current (DC) peak collector current total power dissipation storage temperature junction temperature operating ambient temperature Tamb 25 C; note 1 - - - - - -65 - -65 CONDITIONS open emitter open base open collector - - - MIN.
PDTB114ET
MAX. -50 -50 -10 +10 -40 -500 -500 250 +150 150 +150 V V V V V
UNIT
mA mA mW C C C
VALUE 500
UNIT K/W
1997 Sep 02
3
Philips Semiconductors
Objective specification
PNP resistor-equipped transistor
CHARACTERISTICS Tj = 25 C unless otherwise specified. SYMBOL ICBO ICEO IEBO hFE VCEsat Vi(off) Vi(on) R1 R2 ------R1 Cc Note 1. Pulse test: tp 300 s; 0.02. PARAMETER collector cut-off current collector cut-off current emitter cut-off current DC current gain collector-emitter saturation voltage input-off voltage input-on voltage input resistor resistor ratio collector capacitance IE = ie = 0; VCB = -10 V; f = 1 MHz CONDITIONS IE = 0; VCB = -50 V IB = 0; VCE = -30 V IB = 0; VCE = -30 V; Tj = 150 C IC = 0; VEB = -5 V IC = -5 mA; VCE = -5 V; note 1 IC = -50 mA; IB = -2.5 mA; note 1 IC = -100 A; VCE = -5 V IC = -10 mA; VCE = -300 mV MIN. - - - - 56 - - -3 7 0.8 -
PDTB114ET
TYP. - - - - - - - - 10 1 -
MAX. -100 -1 -50 -500 - -300 -500 - 13 1.2 9
UNIT nA A A A mV mV V k
pF
1997 Sep 02
4
Philips Semiconductors
Objective specification
PNP resistor-equipped transistor
PACKAGE OUTLINE Plastic surface mounted package; 3 leads
PDTB114ET
SOT23
D
B
E
A
X
HE
vMA
3
Q A A1
1
e1 e bp
2
wMB detail X Lp
c
0
1 scale
2 mm
DIMENSIONS (mm are the original dimensions) UNIT mm A 1.1 0.9 A1 max. 0.1 bp 0.48 0.38 c 0.15 0.09 D 3.0 2.8 E 1.4 1.2 e 1.9 e1 0.95 HE 2.5 2.1 Lp 0.45 0.15 Q 0.55 0.45 v 0.2 w 0.1
OUTLINE VERSION SOT23
REFERENCES IEC JEDEC EIAJ
EUROPEAN PROJECTION
ISSUE DATE 97-02-28
1997 Sep 02
5
Philips Semiconductors
Objective specification
PNP resistor-equipped transistor
DEFINITIONS Data Sheet Status Objective specification Preliminary specification Product specification Limiting values
PDTB114ET
This data sheet contains target or goal specifications for product development. This data sheet contains preliminary data; supplementary data may be published later. This data sheet contains final product specifications.
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale.
1997 Sep 02
6
Philips Semiconductors
Objective specification
PNP resistor-equipped transistor
NOTES
PDTB114ET
1997 Sep 02
7
Philips Semiconductors - a worldwide company
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For all other countries apply to: Philips Semiconductors, Marketing & Sales Communications, Building BE-p, P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825 (c) Philips Electronics N.V. 1997
Internet: http://www.semiconductors.philips.com
SCA54
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
117047/00/04/pp8
Date of release: 1997 Sep 02
Document order number:
9397 750 02757

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